This is an archive of a course I taught Fall 2016, preserved here as a resource for future students.

ECE 550: Fundamentals of Computer Systems and Engineering

Section 01, Fall 2016

This course will basically teach you how to build this,
but virtually, and for less than $50k.


Lecture location: Hudson 208
Lecture time: MW, 4:40PM - 5:55PM

Instructor: Dr. Tyler Bletsch
Email: Tyler.Bletsch AT
Office Hours: Mon/Wed, 1:30pm-3pm in Hudson 106

Recitation location: Fitzpatrick Schiciano A 1464
Recitation time: Th, 3:05PM - 4:20PM

Teaching Assistants:

TA Office Hours: See Piazza post

Course Textbook: David A. Patterson and John L. Hennessy. Computer Organization and Design: The Hardware/Software Interface, 5th edition, Morgan-Kaufmann. (Amazon, AddAll) — (Not the "ARM" edition or the "Revised Printing")



#DateLectureRecitation (Thu)ReadingHomework due
1 Mon 8/29 Intro, policies
2 Wed 8/31 Transistors to Gates VHDL, Introduction
Quartus Tutorial
Sec B.1-B.2
3 Mon 9/5 Combinatorial Logic Sec B.3-B.5
4 Wed 9/7 Implementing Arithmetic VHDL, FPGA
Sec 3.1-3.2, 3.5
5 Mon 9/12 Storage, Clocking Sec B.7-B.11
6 Wed 9/14 Finite State Machines VHDL, Simulation
Sec B.10, 3.4 (Fri 9/16) Homework 1
7 Mon 9/19 ISAs and MIPS Chap 2
8 Wed 9/21 ISAs and MIPS VHDL, Sequential Circuits
Chap 2
9 Mon 9/26 ISAs and MIPS Chap 2
10 Wed 9/28 ISAs and MIPS VHDL, HW2 help Chap 2
11 Mon 10/3 Datapaths Sec 4.1-4.4 (Tue 10/4) Homework 2
vmem.mif (test image to be displayed)
hw2-vmem.png (PNG of image data as stored)
hw2-vmem-stretched.png (PNG of image data as it will be shown)
hw2-proof.jpg (Photo of a real monitor showing the image)
12 Wed 10/5 Datapaths MIPS and SPIM Sec 4.1-4.4
Mon 10/10 FALL BREAK
13 Wed 10/12 Datapaths MIPS Sec 4.1-4.4
14 Mon 10/17 Memory Hierarchy Sec 5.1-5.5 (Tue 10/18) Homework 3
15 Wed 10/19 Memory Hierarchy Digging into Homework 4 Sec 5.1-5.5
16 Mon 10/24 Memory Hierarchy Sec 5.1-5.5
17 Wed 10/26 Memory Hierarchy
(6pm) Midterm review
Homework 4 Clinic Sec 5.1-5.5
18 Mon 10/31 Virtual Memory Sec 5.6-5.9
19 Wed 11/2 Virtual Memory Midterm Exam
Study guide
Practice midterm
Practice solutions
Last semester's midterm
Provided reference sheet
Sec 5.6-5.9
20 Mon 11/7 Interrupts and Exceptions Sec 4.9 (Tue 11/8) Homework 4
Skeleton project
Testing tools
21 Wed 11/9 Interrupts and Exceptions Getting started on HW5
Sec 4.9
22 Mon 11/14 IO Sec A.8
23 Wed 11/16 Operating Systems Homework help Fast File System for UNIX by McKusick, et al.,
Process Scheduling by Krzyzanowski,
How Computers Boot Up by Duarte
24 Mon 11/21 Networking Intro to Computer Networks by Dordal, ch. 1
25 Mon 11/28 Pipelining Sec 4.5-end
26 Wed 11/30 Intel x86 Course review Sec 4.5-end (Fri 12/2) Homework 5 ← Updated 2016-11-09!
Skeleton project
Interface overview diagram
Testing traces
Mon 12/19 Exam: 9am-12pm
Study guide
Practice final
Practice solutions
Provided reference sheet


VHDL and the DE-115

MIPS assembly language

Syllabus & policies

Course synopsis

This class is aimed at MS/MEng students who want to focus on Computer Engineering, but whose undergraduate degree is in an area other than Computer Engineernig. This course will bring students up to speed on digitial logic, processor design, ISA concepts, MIPS assembly, caches, operating systems and networking.

Grading breakdown

This course will include regular in-class quizzes, a series of homework assignments, and two exams (midterm and final). Grading breakdown:

Lecture/recitation attendance10%
Final exam35%

Lecture/recitation attendance

Attendance is required. For lectures, it will be checked by a series of around 8 pop quizzes. The quizzes mainly serve as an early warning to detect if you're having trouble with the material. Your bottom two quiz scores will be dropped.

For recitation, full credit will be awarded for good faith effort on the work for the day. A small number of absences will be permitted to recitation. This number is likely 2, but please don't try to "spend" absences like currency.


All assignments must be submitted as plain text or PDF; no Word documents will be accepted.

Late Policy: Each group has a budget of 5 late days total for the semester. Using a late day does not change demo deadline, only submission deadline. Measurement is days, not classes. Late days are indivisible -- 10 minutes late = 1 day used. After used up: must turn in on time else ZERO credit. Exceptions may be made at instructor discretion, just talk to me (e.g., serious injury/illness, family emergency, etc.).

Grading and assessment of tardiness will be based on what you submit to Sakai and when you submit it (not submissions via email/printout/fax/whatever).

Grade appeals

All regrade requests must be in writing. Email the TA with your questions. After speaking with the TA, if you still have concerns, contact the instructor.

All regrade requests must be submitted to the instructor no later than 1 week after the assignment was returned to you.

Academic integrity

I take academic integrity extremely seriously. Academic misconduct will not be tolerated, and all suspected violations of the Duke Honor Code will be referred to the Office of Student Conduct (for undergraduates) or the departmental Director of Graduate Studies (for graduate students). A student found responsible for academic dishonesty faces formal disciplinary action, which may include suspension. A student twice suspended automatically faces a minimum 5-year separation from Duke University.

In addition to the measures taken by the Office of Student Conduct, the affected assignment(s) will receive zero credit, or possibly -100% in egregious cases.

If you are considering this course of action, please see me instead, and we can work something out! I want every student in my course to be successful.

For clarity, below are examples of acceptable and unacceptable behavior with respect to academic integrity: